1 idt54/74fct521/a/b/c fast cmos 8-bit identity comparator military and commercial temperature ranges june 2000 1999 integrated device technology, inc. dsc-4617/2 c idt54/74fct521/a/b/c military and commercial temperature ranges fast cmos 8-bit identity comparator description: the fct521 is an 8-bit identity comparator built using an advanced dual metal cmos technology. these devices compare two words of up to eight bits each and provide a low output when the two words match bit for bit. the expansion input i a = b also serves as an active low enable input. functional block diagram a 0 b 0 a 1 b 1 a 2 b 2 a 3 b 3 a 4 b 4 a 5 b 5 a 6 b 6 a 7 b 7 i a=b o a=b 2 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 1 19 features: - idt54/74fct521 equivalent to fast tm speed - idt54/74fct521a 35% faster than fast - idt54/74fct521b 50% faster than fast - idt54/74fct521c 60% faster than fast - equivalent to fast output drive over full temperature and voltage supply extremes - i ol = 48ma (commercial), and 32ma (military) - cmos power levels (1mw typ. static) - ttl input and output level compatible - cmos output level compatible - substantially lower input current levels than fast (5 a max.) - jedec standard pinout for dip and lcc - military product compliant to mil-std-883, class b - available in the following packages: commercial: soic military: cerdip, lcc, cerpack
2 military and commercial temperature ranges idt54/74fct521/a/b/c fast cmos 8-bit identity comparator function table (1) inputs output i a = b a, b o a = b l l h h a = b* a 1 b a = b* a 1 b l h h h pin description pin names description a 0 - a 7 word a inputs b 0 - b 7 word b inputs i a = b expansion or enable input (active low) o a = b identity output (active low) note: 1. h = high voltage level l = low voltage level *a0 = b0, a1 = b1, a2 = b2, etc. pin configuration cerdip/ soic/ cerpack top view lcc top view 1 2 3 4 5 7 9 6 8 10 11 12 13 14 15 16 17 18 19 20 l20-2 b 6 b 7 a 7 a 6 b 5 i a = b b 0 a 0 v cc b 3 gnd a 4 b 4 a 5 index a 1 b 1 a 3 a 2 b 2 o a =b 2 3 1 16 15 14 11 19 18 20 17 13 12 5 6 7 4 d20-1 so20-2 e20-1 8 9 10 a 1 a 0 b 0 v cc b 1 a 3 a 2 b 2 b 3 gnd o a=b b 6 b 7 a 7 a 6 b 4 b 5 a 5 a 4 i a=b absolute maximum ratings (1) symbol rating commercial military unit v term (2) terminal voltage with respect to gnd C0.5 to +7 C0.5 to +7 v v term (3) terminal voltage with respect to gnd C0.5 to v cc C0.5 to v cc v t a operating temperature 0 to +70 C55 to +125 c t bias temperature under bias C55 to +125 C65 to +135 c t stg storage temperature C55 to +125 C65 to +150 c p t power dissipation 0.5 0.5 w i out dc output current 120 120 ma 8-link notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. no terminal voltage may exceed v cc by +.5v unless otherwise noted. 2. input and v cc terminals only. 3. outputs and i/o terminals only. capacitance (t a = +25 o c, f = 1.0mhz) symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 6 10 pf c out output capacitance v out = 0v 8 12 pf 8-link note: 1. this parameter is measured at characterization but not tested.
3 idt54/74fct521/a/b/c fast cmos 8-bit identity comparator military and commercial temperature ranges dc electrical characteristics over operating range following conditions apply unless otherwise specified: v lc = 0.2v; v hc = v cc C 0.2v commercial: t a = 0c to +70c, v cc = 5.0v 5%; military: t a = C55c to +125c, v cc = 5.0v 10% symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level guaranteed logic high level 2 v v il input low level guaranteed logic low level 0.8 v i ih input high current v cc = max. v i = v cc 5a v i = 2.7v 5 (4) i il input low current v i = 0.5v C5 (4) v i = gnd C5 v ik clamp diode voltage v cc = min., i n = C18ma C0.7 C1.2 v i os short circuit current v cc = max. (3) , v o = gnd C60 C120 ma v oh output high voltage v cc = 3v, v in = v lc or v hc , i oh = C32 a v hc v cc v v cc = min. i oh = C300 a v hc v cc v in = v ih or v il i oh = C12ma mil. 2.4 4.3 i oh = C15ma com'l. 2.4 4.3 v ol output low voltage v cc = 3v, v in = v lc or v hc , i ol = 300 a gnd v lc v v cc = min. i ol = 300 a gnd v lc (4) v in = v ih or v il i ol = 32ma mil. 0.3 0.5 i ol = 48ma com'l. 0.3 0.5 notes : 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at vcc = 5.0v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the short circuit test should not exceed one second. 4. this parameter is guaranteed but not tested.
4 military and commercial temperature ranges idt54/74fct521/a/b/c fast cmos 8-bit identity comparator notes: 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v); all other inputs at v cc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the i cc formula. these limits are guaranteed but not tested. 6. i c = i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current d i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an output transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz. power supply characteristics v lc = 0.2v; v hc = v cc - 0.2v symbol parameter test conditions (1) min. typ. (2) max. unit i cc quiescent power supply current v cc = max. v in 3 v hc ; v in v lc 0.21.5ma d i cc quiescent power supply current ttl inputs high v cc = max. v in = 3.4v (3) 0.5 2 ma i ccd dynamic power supply current (4) v cc = max. outputs open one input toggling 50% duty cycle v in 3 v hc v in v lc 0.15 0.25 ma/ mhz i c total power supply current (5) v cc = max. outputs open v in 3 v hc v in v lc (fct) 1.7 4 ma fi = 10mhz one bit toggling 50% duty cycle v in = 3.4v v in = gnd 2 5 notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. switching characteristics over operating range - commercial idt74fct521 idt74fct521a idt74fct521b idt74fct521c symbol parameter condition (1) min . (2) max . min . (2) max . min . (2) max . min . (2) max . unit t plh t phl propagation delay an or bn to o a = b c l = 50pf r l = 500 w 1.5 11 1.5 7.2 1.5 5.5 1.5 4.5 ns t plh t phl propagation delay i a = b to o a = b 1.5 10 1.5 6 1.5 4.6 1.5 4.1 ns switching characteristics over operating range - military idt54fct521 idt54fct521a idt54fct521b idt54fct521c symbol parameter condition (1) min . (2) max . min . (2) max . min . (2) max . min . (2) max . unit t plh t phl propagation delay an or bn to o a = b c l = 50pf r l = 500 w 1.5 15 1.5 9.5 1.5 7.3 1.5 5.1 ns t plh t phl propagation delay i a = b to o a = b 1.5 9 1.5 7.8 1.5 6 1.5 4.5 ns
5 idt54/74fct521/a/b/c fast cmos 8-bit identity comparator military and commercial temperature ranges pulse generator r t d.u.t. v cc v in c l v out 50pf 500 w 500 w 7.0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v 3v 1.5v 0v data input timing input asynchronous control preset clear etc. synchronous control t su t h t rem t su t h high-low-high pulse low-high-low pulse t w 1.5v 1.5v same phase input transition 3v 1.5v 0v 1.5v v oh t plh output opposite phase input transition 3v 1.5v 0v t plh t phl t phl v ol control input 3v 1.5v 0v 3.5v 0v output normally low output normally high switch closed switch open v ol 0.3v 0.3v t plz t pzl t pzh t phz 3.5v 0v 1.5v 1.5v enable disable v oh preset clear clock enable etc. octal link octal link octal link octal link octal link test cir cuits and w a veforms propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times pulse width switch position test switch open drain disable low closed enable low all other tests open 8-link definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. notes: 1. diagram shown for input control enable-low and input control disable-high. 2. pulse generator for all pulses: rate 1.0mhz; zo 50 w; t f 2.5ns; t r 2.5ns.
6 military and commercial temperature ranges idt54/74fct521/a/b/c fast cmos 8-bit identity comparator corporate headquarters for sales: 2975 stender way 800-345-7015 or 408-727-6116 santa clara, ca 95054 fax: 408-492-8674 www.idt.com* *to search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. the idt logo is a registered trademark of integrated device technology, inc. ordering information idt xx temp. range xxxx device type xx package x process so commercial options small outline ic (so20-2) fast cmos 8-bit identity comparator 54 74 C 55 c to +125 c C 0 c to +70 c d e l military options cerdip (d20-1) cerpack (e20-1) leadless chip carrier (l20-2) blank b commercial mil-std-883, class b fct 521 521a 521b 521c
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